Gap-coupling bus system

ABSTRACT

There is provided a gap coupling type bus system, which makes it possible to mutually transfer data between all the modules connected to the bus. The gap coupling type bus system comprises for at least three modules, each module being provided with at least one sending/receiving circuit for sending and receiving a signal: at least three signal lines ( 21-26 ) respectively connected to the at least three modules ( 11-16 ); and terminating resistors ( 31-36 ) connected to respective signal lines at the other ends of the signal lines, each terminating resistor having generally same value as characteristic impedance of the signal line. Those at least three signal lines ( 21-26 ) have portions ( 1 - 2, 1 - 3, 2 - 3 , . . . ) laid in parallel with one another with a predetermined gap, correspondingly to every combination of different two modules out of those at least three modules ( 11-16 ).

TECHNICAL FIELD

The present invention relates to a gap coupling type bus system forcarrying out fast data transfer between functional components in aninformation processing unit.

BACKGROUND ART

As the conventional gap coupling (directional coupling) type bus system,there is such a bus system shown as non-contact type bus wiringdescribed in Japanese Unexamined Patent Laid-Open No. 7-141079.

In this non-contact type bus wiring described in 7-141079, the bussystem includes one and only bus master and many bus slaves. Eachtransmission line of the bus system shown in this literature is notconnected directly with another line. Signal that passes onetransmission line induces another transmission line to generate signalin that transmission line through so-called “cross talk noise”generation mechanism via inductive and capacitive couplings withpredefined gaps. The latter signal, which is essentially cross talknoise, is demodulated to complete data transfer. To this end, the wiringis so constructed that the transmission line extended from the singlebus master is terminated by a terminating resistor at its far end, andtransmission lines connected to the plurality of bus slaves run.acertain length in parallel with the former transmission line.

Signal outputted from the bus master induces signal in everytransmission line connected to respective bus slave, owing to theso-called “cross talk noise” generation mechanism, thus providing thesame data to each bus slave.

On the other hand, signal outputted from a bus slave onto thetransmission line connected thereto, induces signal in the transmissionline connected to the bus master, owing to the cross talk noisegeneration mechanism. The bus master demodulates this signal to completedata transfer.

As described above, the non-contact type bus wiring described in7-141079 can transfer data between a bus master and a plurality of busslaves.

Now, data transfer among all the modules on a bus has become an ordinarymatter, and, in terms of the non-contact bus wiring described in theabove-mentioned 7-141079, data transfer from one bus slave to anotherbus slave is a prerequisite for employing the bus system in aninformation processing unit.

However, direct data transfer among the bus slaves has been difficult,since the transmission lines of the bus slaves are arranged to beconnected indirectly with one another via the transmission line of thebus master. Namely, signal, i.e. so-called “cross talk noise”, inducedon the transmission line connected to the bus master is small in itsamplitude, and even when this signal generates another signal on atransmission line connected to another bus slave, through cross talknoise generation mechanism, the resultant signal amplitude is minimum.To demodulate this signal, it is too small in its amplitude relativelyto swing of power supply potential or with unnecessary radiant noise.Further, it is difficult for a demodulator circuit mounted on a busslave or the bus master to attain required sensitivity. Thus, the priorart system is not suitable for data transfer between bus slaves, or, inother words, modern data transfer between all modules connected to a bussystem.

Further, clock distribution in the conventional bus topology using, forexample, TTL has its limit at some dozen MHz.

Accordingly, an object of the present invention is to provide a gapcoupling type bus system that permits the mutual data transfer among allmodules connected to a bus.

Another object of the present invention is to provide a gap couplingtype bus system that can speed up clock distribution in bus topology.

DISCLOSURE OF THE INVENTION

A gap coupling type bus system according to the present invention ischaracterized in that it comprises, for at least three modules, eachmodule being provided with at least one sending/receiving circuit forsending and receiving a signal: at least three signal lines respectivelyconnected to the at least three modules, and terminating resistorsconnected to respective signal lines at the other ends of the signallines, each terminating resistor having generally same value ascharacteristic impedance of the signal line, wherein the at least threesignal lines have portions laid in parallel with one another with apredetermined gap, correspondingly to every combination of different twomodules out of the at least three modules.

According to this construction, since, for each combination of differenttwo modules out of at least three modules, there is a coupled portionvia a gap, mutual data transfer is permitted between any modules,without having one as a master.

In this construction, the at least three signal lines are laid in agenerally netlike pattern, by, for example, crossing one another ingrade separation. In that case, it is preferable that said signal linesare laid in parallel at portions of crossing in grade separation. Thisrealizes good gap couplings at those portions.

For example, the at least three modules are arranged in a line; theterminating resistors corresponding to these modules are arranged inparallel with the line of the modules at a distance from the modules;and each signal line is laid in a meander shape between each module anda corresponding one of the terminating resistor.

By such construction, each module can identify a module that outputteddata, depending on difference in data arrival times.

In one embodiment, all the bus modules are arranged in a line (assumedto be a longitudinal direction), and signal lines connected torespective modules are drawn out laterally. When there are four busmodules for example, 1st and 2nd signal lines of those drawn-out signallines are coupled via a gap, and 3rd and 4th are coupled via a gap, justafter the drawing out. Next, before further drawing out the lineslaterally, their order is changed to 2nd, 1st, 4th, and 3rd in thelongitudinal direction, and after the drawing out, 1st and 4th arecoupled via a gap. Before continuing to draw out laterally, their orderis changed to 4th, 2nd, 3rd, and 1st, and after the drawing out, 2nd and3rd are coupled via a gap. After the above couplings via a gap, thesignal lines are connected to respective terminating resistors, to forma netlike pattern.

By thus forming the signal lines in a netlike pattern, every signal linecan be coupled with all the other signal lines via gap, and datatransfer between any bus modules can be realized.

As described above, the signal lines are laid in parallel with eachother at a portion of grade separation. However, the signal lines may belaid such that, at some portions of the grade separation, the signallines cross each other at a right angle. By this, wiring lengthcontributing to that gap coupling between the signal lines becomes theminimum, and signal induced by the cross talk generating mechanism isvery small. Thus, it is possible to use grade separation withoutaccompanying the gap coupling, and wiring flexibility is enhanced.

Other gap coupling type bus system of the present invention ischaracterized in that each module and each terminating resistorcorresponding to that module positioned at both ends of each signal lineare arranged adjacently, and each of the at least three signal lines islaid in a loop or fold structure from the relevant module to theterminating resistor corresponding to that module.

For example, the at least three modules are arranged generally in aline, and the signal line of each module has portions laid in parallelwith and adjacently to other signal lines successively in mid course ofthe wiring in the loop or fold structure from its own sending/receivingcircuit to the corresponding terminating resistor.

In such construction, total length of each signal line in the loop orfold structure is generally same for any of the modules, and totallength from a sending/receiving circuit of one module through theportions laid in parallel and adjacently, to a sending/receiving circuitof other module is generally same for every case.

By this, data outputted from whichever module arrives at target modulesat the same time (simultaneous arrival). By this, data transfer cyclecan be determined by delay time from start time of outputting signal toarrival and the number of repeated cycles for data. Thus, it is possibleto easily realize a simple bus protocol, similarly to the conventionalbus.

Still other gap coupling type bus system of the present invention ischaracterized in that, it comprises, for at least three modules, eachmodule being provided with at least one sending/receiving circuit forsending and receiving a signal: at least three signal lines respectivelyconnected to the at least three modules; and terminating resistorsconnected to respective signal lines at other ends of the signal lines,each terminating resistor having generally same value as characteristicimpedance of the signal line; wherein, one of the at least three signallines is a basic signal line, and signal lines of the modules other thanthe basic signal line are successively laid in parallel with the basicsignal line with a predetermined gap to form stubs, and total lengthfrom a module having the basic signal line through the portion laid inparallel, and through other signal line forming the stub, to the othermodule is generally same, for any ones of the other modules.

By this construction of the present invention, it is possible to attainwiring of true bus topology having high speed property and constantpropagation delay time for signals. In particular, it is possible tospeed up clock distribution in the bus topology.

Other gap coupling type bus system according to the present invention ischaracterized in that, in the above-described bus system, the signalline connected with the sending/receiving circuit has two distributionconductors, a sending circuit of said sending/receiving circuit outputsan equivalent onto one of said two distribution conductors, and aninverted value onto the other of the two distribution conductors,depending on a logical value of an input of the sending/receivingcircuit, and a receiving circuit of the sending/receiving circuit takesa form of a differential circuit that receives, as inputs, theequivalent of one of the two distribution conductors and the invertedvalue of the other, and outputs the logical value after demodulation.

Thus, by using two distribution conductors in a pair, as a signal line,and forming differential circuit, with one polarity being inverted,input amplitude of the differential circuit of the receiving side moduleis expanded to twice as large as the original amplitude, and designedsensitivity of the differential circuit can be relaxed. Further, evenwhen the center of amplitude, i.e. ground potential swings due to somefactor, the differential circuit can demodulate the signals withoutdepending on the ground potential, and thus has an excellent noiseinsulating characteristic.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a view showing a gap coupling type bus system of a firstembodiment according to the present invention;

FIG. 2 is a view showing signal inducing mechanism of the gap couplingtype bus system of the first embodiment of the present invention;

FIG. 3 is a view showing signal propagation in the gap coupling type bussystem of the first embodiment of the present invention;

FIG. 4 is a view showing continuous signal propagation in the gapcoupling type bus system of the first embodiment of the presentinvention;

FIG. 5 is a view showing data arrival times in LSIs constituting the gapcoupling type bus system of the first embodiment of the presentinvention;

FIG. 6 is a view showing layer structure of a printed circuit boardconstituting the gap coupling type bus system of the first embodiment ofthe present invention;

FIG. 7 is a view showing wiring in the printed circuit boardconstituting the gap coupling type bus system of the first embodiment ofthe present invention;

FIG. 8 is a view showing a gap coupling type bus system of a secondembodiment according to the present invention;

FIG. 9 is a view showing signal propagation in the gap coupling type bussystem of the second embodiment of the present invention;

FIG. 10 is a view showing a gap coupling type bus system of a thirdembodiment according to the present invention;

FIG. 11 is a view showing signal propagation in the gap coupling typebus system of the third embodiment of the present invention;

FIG. 12 is a view showing a gap coupling type bus system of a fourthembodiment according to the present invention;

FIG. 13 is a view showing a relation between input and output of adifferential comparator for demodulating signal of the gap coupling typebus system of the fourth embodiment of the present invention;

FIG. 14 is a view showing signal propagation in the gap coupling typebus system of the fourth embodiment of the present invention;

FIGS. 15A and 15B are views showing wiring in the printed circuit boardconstituting the gap coupling type bus system of the fourth embodimentof the present invention;

FIG. 16 is a view showing internal structure of a network router orelectronic switching system having a back plane comprising cablefurnished with the gap coupling type bus system of the embodiment of thepresent invention;

FIG. 17 is a view showing internal structure of a network router orelectronic switching system having a back plane comprising printedcircuit boards furnished with the gap coupling type bus system of theembodiment of the present invention; and

FIG. 18 is a view showing internal structure of a computer furnishedwith the gap coupling type bus system of the embodiment of the presentinvention.

BEST MODE FOR CARRYING OUT THE INVENTION

A first embodiment of the gap coupling type bus system according to thepresent invention will be described referring to FIGS. 1-7. In thefigures, the reference numerals 11-16 refer to LSIs connected to the gapcoupling bus system of the present invention; 21-26 to distributionconductors in a printed circuit board, connecting with theabove-mentioned LSIs respectively; 31-36 to terminating resistorconnected with other ends of the distribution conductors 21-26 of theprinted circuit board; 41 p; 41 n, and 43 to signals outputted by LSI ofa bus master; 410 p, 410 n, 412, 413, 414, 415, 416, 431, 432, 434, 435,436 to signals received by LSIs of a sink; 200 a, b to signal layers ofthe printed circuit board; 200 g 1, g 2 to ground layers of the printedcircuit board; 200 v to a power supply layer of the printed circuitboard; 23 a, 25 a, 25 b, and 26 b to distribution conductors in thesignal layers of the printed circuit board; and 200 ag, 200 bg todistribution conductors in the signal layers, for which potential ismade to be ground potential.

FIG. 1 shows wiring of the gap coupling type bus system. Signal line,i.e., distribution conductor 21 of the printed circuit board connectedto LSI 11, in the gap coupling type bus system, is connected to theterminating resistor 31 at the lower right of the figure. Similarly,distribution conductors 22-26 of the printed circuit board are connectedto LSIs 12-16, and connected to terminating resistors 32-36 at the rightend, respectively. Signal, which starts from LSI 11, propagates throughthe distribution conductor 21 of the printed circuit board, and inducessignal in the distribution conductor 22 of the printed circuit board viaa gap shown by 1-2, owing to so-called cross talk noise generationmechanism. Similarly, at 1-4, it induces signal in the distributionconductor 24 of the printed circuit board; at 1-6, signal in thedistribution conductor 26; at 5-1, signal in the distribution conductor25 of the printed circuit; and, at 1-3, signal in the distributionconductor 23, respectively. Last, the signal arrives at the terminatingresistor 31, and disappears there. Among the induced signals, signalscorresponding to so-called backward cross talks propagate toward LSIs12-16 through the distribution conductors 22-26 of the printed circuitboard, respectively, and are demodulated in LSIs 12-16, to complete datatransfer.

In the wiring shown in FIG. 1, similarly to LSI 11, a signal outputtedfrom any of LSIs 12-16, arrives at the other LSIs as the backward crosstalk, to complete demodulated data transfer. Namely, this netlike wiringpermits data transfer among all the LSIs.

FIG. 2 shows signal outputted from LSI and backward cross talk noisereceived and demodulated. In the first embodiment of the presentinvention, output signal is 5 V at “H” level and 4 V at “L” level, whichare output levels compatible with so-called P-ECL. This signal 41 pinduces amplitude 410 p of 60-70 mV centering at GND level, as crosstalk via the gap coupling between distribution conductors. As shown inthe figure, 41 p produces signal waveform 410 p, and 41 n producessignal waveform 410 n.

Propagation of the waveform produced by the mechanism of FIG. 2 is shownin FIG. 3. In FIG. 3, the horizontal axis indicates time series, and thevertical axis shows LSIs 11-16 successively from the top.

First, as shown, signal 41 outputted by LSI 11 induces 412 via 1-2, and412 arrives at LSI 12. Then, the signal 41 induces 414 via 1-4, and 414arrives at LSI 14. Next, the signal 41 induces 416 via 1-6, and 416arrives at LSI 16, and then 41 induces 415 via 5-1, and 415 arrives atLSI 15. Then, the signal 41 induces 413, and 413 arrives at LSI 13.

Further, it is shown that, signal 43 outputted by LSI 13 induces 434 via3-4, and 434 arrives at LSI 14. Then, the signal 43 induces 436 via 3-6,and 436 arrives at LSI 16. Next, the signal 43 induces 435 via 3-5, and435 arrives at LSI 15, and then, the signal 43 induces 431 via 1-3, and431 arrives at LSI 11. Then, the signal 43 induces 432 via 2-3, and 432arrives at LSI 12.

FIG. 4 shows propagation in the case of successively outputting packets.Each of outputs 41, 43 of LSIs 11, 13 consists of successive packets.These outputs arrive as 412-416, and as 431, 432, 434-436, each havingthe same cycle as the successive packets 41, 43 (both in terms of acycle of each lump of successive packets and in terms of a cycle of eachpacket of successive packets).

FIG. 5 shows arrival times of the data shown in FIGS. 3 and 4, arrangingthem according to LSIs receiving the data. It is characterized in that,in LSI 11, the data of LSI 12 arrives after δT1 from the start of a datatransfer cycle, the data of LSI 14 after δT2, the data of LSI 16 afterδT3, the data of LSI 15 after δT4, and the data of LSI 13 after δT5.From this characteristic, LSI 11 identifies LSI that outputted data,depending on which of δT1-δT5 is the arrival time of that data.Similarly, LSIs 12-16 are characterized in that data arrive betweenδT1-δT6 from the start of the data transfer cycle. From thischaracteristic, each LSI identifies LSI that outputted the data,depending on which of δT1-δT6 is the arrival time of that data. Thus,utilizing the difference in delay times for identifying a source ID(address), it becomes unnecessary to send the source ID.

Referring to FIGS. 6 and 7, structure of the printed circuit used in thefirst embodiment of the present invention will be described. In thefirst embodiment of the gap coupling type bus system of the presentinvention, the distribution conductors 21-26 are distribution conductorsof the printed circuit board. Using the printed circuit board, impedanceand coupling coefficient between distribution conductors can be easilycontrolled, and high density packaging can be attained in wiring ofrequired signal lines. As the distribution conductors for implementingthe gap coupling type bus system of the present invention, one which iseasily bent owing to its structure, such as a flat cable or flexibleboard, may be used instead of the printed circuit board.

FIG. 6 shows basic cross-sectional structure of the printed circuitboard of the gap coupling type bus system of the present invention. Theprinted circuit board has the multi-layered structure as shown, andrealized in such a manner that, distribution conductors are printed byetching or the like on a film made of glass epoxy or the like, and suchfilms are laminated and adhered to each other. Instead of the laminationof the present invention, a board made up by the build-up process may beused to realize the gap coupling type bus system of the presentinvention.

Conductors of the laminated printed circuit board are a ground layer 200g 1 coupled to the ground of the power supply, signal layers 200 a, 200b, a power supply layer 200 v, and a ground layer 200 g 2 coupled to theground of the power supply, successively from the top layer. The signallayers 200 a, 200 b are covered with the ground layer 200 g 1 and thepower supply layer 200 v in the so-called “sandwich” manner. As a resultof this structure, impedance of the signal layers 200 a, 200 b isdefined by a gap between the ground layer 200 g 1 and the power supplylayer 200 v, and sizes of the signal layers 200 a, 200 b.

By arranging the ground layer 200 g 2, which is coupled to the ground ofthe power supply, under the power supply layer 200 v, so-called feedsystem impedance is lowered. This suppresses high speed signals thatpropagate through the signal layers 200 a, 200 b, in other words,unnecessary electromagnetic emission or radiation caused by currentvariation. Further, also the ground layer 200 g 1 suppresses high speedsignals that propagate through the signal layers 200 a, 200 b, in otherwords, unnecessary electromagnetic emission or radiation caused bycurrent variation. These power supply layer 200 v and ground layers 200g 1, 200 g 2 not only suppress the unnecessary electromagnetic emissionor radiation but also prevent or shield from rushing-in ofelectromagnetic field from the external environment of the printedcircuit board.

In the gap coupling type bus system of the present invention, thepotential induced at the gap is weak, and accordingly is shielded by thepower supply layer 200 v and the ground layers 200 g 1, 200 g 2,preventing destruction of the propagating signal and malfunction of thesystem as a whole owing to this destruction.

FIG. 7 shows a part of wiring pattern of the distribution conductors inthe printed circuit board of the gap coupling type bus system of thepresent invention.

A distribution conductor 23 a of the printed circuit board is coupledwith a distribution conductor 26 b via a gap at the upper left in thefigure. This gap is 3-6 in FIG. 1. Signal propagated through thedistribution conductor 23 a induces the distribution conductor 26 b, orsignal propagated through the distribution conductor 26 b induces thedistribution conductor 23 a, so as to transmit the signal.

From this portion, the distribution conductor 26 b goes obliquely towardthe upper right, and the distribution conductor 23 a goes obliquelytoward the lower right.

A distribution conductor 25 a of the printed circuit board is connectedwith a distribution conductor 25 b through a via hole at the lower leftin the figure. As a matter of fact, the distribution conductor 25 acomes from the left and outside of the figure, and goes obliquely fromthe upper left to arrive at the via hole shown. From the via hole, thedistribution conductor 25 b goes obliquely toward the upper right, andcoupled, via a gap, with the distribution conductor 23 a which has goneobliquely toward the lower right. This gap is 3-5 in FIG. 1. Theseconductors 23 a, 25 a and 26 b, 25 b are laid in the signal layers 200 aand 200 b, respectively. A conductor 200 ag is laid so as to surroundthe conductors 23 a, 25 a in parallel with them, and a conductor 200 bgis laid so as to surround the conductors 26 b, 25 b in parallel withthem. At portions where these 200 ag and 200 bg cross in gradeseparation, via holes are provided. By these via holes, 200 g 1, 200 g2, 200 ag, 200 bg are connected with one another, and their potential isset to the ground potential. This grounding is called a guard pattern,and by this guard pattern, conductors 23 a and 25 a, for example, areseparated from each other in their electromagnetic fields, thusexcluding coupling within the same signal layer.

Referring to FIGS. 8 and 9, a second embodiment of the gap coupling typebus system of the present invention will be described. In the figures,reference numerals 101-104 refer to LSIs connected to the gap couplingtype bus system of the present invention, 201-204 to distributionconductors of a printed circuit board connected to those LSIsrespectively, 301-304 to terminating resistors connected to other endsof the distribution conductors 201-204 of the printed circuit board.

FIG. 8 shows wiring of the gap coupling type bus system of the secondembodiment of the present invention. In the figure, LSI 101 connected tothe gap coupling type bus system is connected to the distributionconductor 201 of the printed circuit board through signal line, and thedistribution conductor 201 goes obliquely toward the lower right in thefigure. In mid course, it passes by gaps with the distributionconductors 202, 203 and 204, and returns to the neighborhood of LSI 101.Its end portion is connected to the terminating resistor 301.

Similarly, LSI 102 is connected to the distribution conductor 202 of theprinted circuit board, and the distribution conductor 202 goes obliquelytoward lower right in the figure. In mid course, it passes by gaps withthe distribution conductors 203, 204, turns in a loop shape, goesobliquely toward the upper right in the figure, passes by a gap with thedistribution conductor 204, and returns to the neighborhood of LSI 102.Its end portion is connected to the terminating resistor 302.

LSI 103 is connected to the distribution conductor 203 of the printedcircuit board, and the distribution conductor 203 goes obliquely towardlower right in the figure. In mid course, it passes by a gap with thedistribution conductor 204, turns in a loop shape, goes obliquely towardthe upper right in the figure, passes by gaps with the distributionconductors 201, 202, and returns to the neighborhood of LSI 103. Its endportion is connected to the terminating resistor 303. Wiring patterns of202 and 203 are axisymmetric with each other.

LSI 104 is connected to the distribution conductor 204 of the printedcircuit board with signal line. The distribution conductor 204 turns ina large loop shape, and thereafter, goes obliquely toward upper right inthe figure. In mid course, it passes by gaps with the distributionconductors 201, 202, 203, and returns to the neighborhood of LSI 104.Its end portion is connected to the terminating resistor 304. Wiringpatterns of 201 and 204 are axisymmetric with each other.

By such wiring, axisymmetric distribution conductors 202 and 203 areequal in their wiring length, as well as distribution conductors 201 and204. Further, in the second embodiment of the present invention, thedistribution conductors 201 and 202 are also laid to be equal in theirwiring length. Namely, the distribution conductors 201-204 are equal intheir wiring length one another.

When LSI 101 sends a signal, it first induces signal in the distributionconductor 202 at the gap shown as 1-2. Signal corresponding to backwardcross talk of the induced signal starts to propagate toward LSI 102.Since amplitude of the signal propagating through the distributionconductor 202 is small, the signal arrives at and received by LSI 102without inducing signals in the distribution conductors 204, 203 at thegaps of 2-4 and 2-3 on route.

In the second embodiment (FIG. 8) of the present invention, the lengthof this path from the distribution conductor 201 through thedistribution conductor 202 to LSI 102 is equal to the total length ofthe distribution conductor 201, since the length from LSI 101 to the gap1-2 is equal to the length from the terminating resistor 302 to the gap1-2.

Next, the signal sent from LSI 101 induces signal in the distributionconductor 203 at the gap 1-3. Signal corresponding to backward crosstalk of the induced signal starts to propagate toward LSI 103. Sinceamplitude of the signal propagating through the distribution conductor203 is small, the signal arrives at and received by LSI 103 withoutinducing signals in the distribution conductor 204 at the gap of 3-4 onroute.

The length of the path from the distribution conductor 201 through thedistribution conductor 203 to LSI 103 is equal to the total length ofthe distribution conductor 201, since the length from LSI 101 to the gap1-3 is equal to the length from the terminating resistor 303 to the gap1-3.

Next, the signal sent from LSI 101 induces signal in the distributionconductor 204 at the gap 1-4. Signal corresponding to backward crosstalk of the induced signal starts to propagate toward LSI 104. Signalthat propagates through the distribution conductor 203 arrives at andreceived by LSI 103.

The length of the path from the distribution conductor 201 through thedistribution conductor 204 to LSI 104 is equal to the total length ofthe distribution conductor 201, since the length from LSI 101 to the gap1-4 is equal to the length from the terminating resistor 304 to the gap1-4.

Thus, as described above, signals induced in respective distributionconductors 202-204 propagate the same distance as the total length ofthe distribution conductor 201, starting from LSI 101, and arrive atrespective LSIs 102-104. Namely, the signal outputted from LSI 101arrives at LSIs 102-104 at the same time.

The above description applies to the path of the distribution conductor204 which is axisymmetric with the distribution conductor 201.Accordingly, signal sent from LSI 104 arrives at LSIs 101-103 at thesame time.

When LSI 102 sends a signal, it first induces signal in the distributionconductor 203 at the gap shown as 2-3. Signal corresponding to backwardcross talk of the induced signal arrives at and received by LSI 103.

The length of the path from the distribution conductor 202 through thedistribution conductor 203 to LSI 103 is equal to the total length ofthe distribution conductor 202, since the length from LSI 102 to the gap2-3 is equal to the length from the terminating resistor 303 to the gap2-3.

Next, the signal sent from LSI 102 induces signal in the distributionconductor 204 at the gap shown as 2-4. Signal corresponding to backwardcross talk of the induced signal arrives at and received by LSI 104.

The length of the path from the distribution conductor 202 through thedistribution conductor 204 to LSI 104 is equal to the total length ofthe distribution conductor 202, since the length from LSI 102 to the gap2-4 is equal to the length from the terminating resistor 304 to the gap2-4.

Last, the signal sent from LSI 102 induces signal in the distributionconductor 201 at the gap shown as 1-2. Signal corresponding to backwardcross talk of the induced signal arrives at and received by LSI 101.

The length of the path from the distribution conductor 202 through thedistribution conductor 201 to LSI 101 is equal to the total length ofthe distribution conductor 202, since the length from LSI 102 to the gap1-2 is equal to the length from the terminating resistor 301 to the gap1-2.

Thus, as described above, signals induced in respective distributionconductors 201, 203, and 204 propagate the same distance as the totallength of the distribution conductor 202, starting from LSI 102, andarrive at respective LSIs 101, 103, and 104. Namely, the signaloutputted from LSI 102 arrives at LSIs 101, 103, 104 at the same time.

The above description applies to the path of the distribution conductor203 which is axisymmetric with the distribution conductor 202.Accordingly, signal sent from LSI 103 arrives at LSI 101, 102, and 104at the same time.

The total length of the distribution conductor 201 is equal to the totallength of the distribution conductor 202, and accordingly, whichever LSIoutputs a signal, signal to be received arrives at all the LSIs at thesame time.

FIG. 9 shows a state of the simultaneous arrival. A signal 41 outputtedby LSI 101 induces signals 412-414, and they arrive at respective LSIs102-104 at the same time. This is same for each of LSI 102-104.

As shown in the second embodiment of the present invention, whicheverLSI outputs a signal, data arrives at the same time with the same timeinterval. By this, data transfer cycle can be determined by delay timefrom start time for outputting a signal to arrival, and the number ofrepeated cycles for data. Thus, it is possible to easily realize asimple bus protocol, similarly to the conventional bus.

In the second embodiment, identification of a source ID is carried outby adding it to requesting data at the time of bus right arbitration, asin the ordinary bus system.

Referring to FIGS. 10, 11, a third embodiment of the gap coupling typebus system of the present invention will be described. In the figures,the reference numeral 110 refers to a crystal oscillator, 11 to LSI of abus master, 112-116 to LSIs of bus slaves, 211 to a distributionconductor of a printed circuit board to which the bus master isconnected, 212-216 to distribution conductors, and 51 to a signalreceived by LSI of a slave.

The distribution conductor 211 is coupled with the distributionconductors 216, 215, 214, 213, and 212 via gaps, and connected to aterminating resistor 311 at its end portion. To the distributionconductor 211, is connected the crystal oscillator 110 or LSI 111 of thebus master.

The distribution conductor 212 is connected with a terminating resistor312 at its end portion, and with the slave LSI 112 at the other endportion.

The distribution conductor 213 is connected with a terminating resistor313 at its end portion, and with the slave LSI 113 at the other endportion. The distribution conductor 213 is provided with a fold in midcourse, to compensate difference in path length starting from theposition of the master LSI 111 between the slave LSIs 112 and 113.

The distribution conductors 214-216 also have folds to compensate theirdifferences in path length starting from the position of the master LSI111, in comparison with the slave LSI 112.

By this arrangement, in the system connected with the crystal oscillator110, clocks of the same phase arrive at the slave LSIs 112-116. By this,clock skew between the slave LSIs is decreased.

Further, in the system connected with the master LSI 111, a signal sentfrom the master LSI 111 arrives at the slave LSIs 112-116 at the sametime, and data transfer cycle can be decided by delay time from starttime for outputting a signal to arrival, and the number of repeatedcycles for data. Thus, it is possible to easily realize a simple busprotocol, similarly to the conventional bus.

Further, a signal sent from any slave LSI arrives at the master LSI 111with the same delay time. As for the master LSI, it becomes easy to setlatching clock from effective time, i.e., a valid window for receivingsignal, and thus, clock synchronous transfer is easily realized. Bythis, frame synchronization that is generally employed in a switchingsystem or network router is easily realized by bus topology.

In the gap coupling type bus system of the present invention, true bustopology is realized such that the distribution conductor 211 connectedto the bus master is a main line, to which distribution conductors212-216 as a plurality of stubs are connected.

The conventional switching system or network router employs daisy chainin which one-to-one connection is used between respective interfaces,and protocol makes it behave as a bus system. Thus, protocol overhead islarge, and quick transferability of transferred information issacrificed.

The reason why bus system connection can not be employed is thatsettling time for signal potential is long owing to waveform distortion,preventing shortening of repeated frequency of signal.

When the gap coupling type bus system of the present invention isemployed, signal waveform propagating through the distributionconductors 212-216 has no distortion, in spite of the distances from theslave LSIs to the distribution conductor 211 corresponding to a mainline. Further, propagation that preserves uniform rise/fall andplatform/depression is realized. In the distribution conductor 211corresponding to the main line, signal is induced from this waveform,and accordingly, distortionless good signal arrives at the master LSI111.

Although the construction of FIG. 10 has been described in relation topropagation of clock, bus wiring of the same construction as FIG. 10 canbe used for data propagation.

According to the third embodiment of the present invention, it ispossible to attain wiring of true bus topology having high speedproperty and constant propagation delay time for signals. The secondembodiment has realized transfer between slaves and same data arrivaltime. The third embodiment realizes this same arrival time property inthe conventional bus form.

FIG. 11 shows propagation of signals, in particular clock, when a clockoscillator is used. Output 41 of the clock oscillator arrives at theslaves LSI 112-116 with constant delay time, demodulated as clock, andused as clock for each slave LSI. Conventionally, clock distributionusing, for example, TTL has limit at some dozen MHz. However, the gapcoupling type bus system of the present invention allows clockdistribution up to the maximum operation frequency of internal circuitsuch as an inverter of the slave LSI. This makes it unnecessary to usehighly-multiplied output of PLL (Phase Lock Loop) frequently used forobtaining multiplied clock inside a slave LSI, or to use PLL itself. Inparticular, it is difficult to design PLL that attains high-frequencyoperation, high bandwidth/high precision/stable oscillation, or highmultiplication. Further, packaging limitation is severe and it takesdesign man-hour and debug man-hour. Thus, functional simplification ofPLL or exclusion of PLL contributes to shortening of product developmentand cost reduction.

Referring to FIGS. 12-15, a fourth embodiment of the gap coupling typebus system of the present invention will be described. In the figures,the reference numerals 121-124 refer to LSIs connected to the gapcoupling type bus system of the present invention, 221 p, n-224 p, n todistribution conductors of a printed circuit board to which theabove-mentioned LSIs are connected respectively, 321 p, n-324 p, n toterminating resistors connected to other ends of the distributionconductors 221 p, n-224 p, n of the printed circuit board, 410 p, 410 n,41 p, and 41 n to signals outputted by LSI of a bus master, 51 to signalreceived by LSI of a sink, 223 pa, 223 pb, 223 na, 223 nb, 224 na, 224pb, 221 na, and 221 pa to distribution conductors in signal layers ofthe printed circuit board.

FIG. 12 shows wiring of the gap coupling type bus system. LSI 121 thatis connected to the gap coupling bus system is connected to thedistribution conductors 221 n, 221 p of the printed circuit boardthrough signal lines, the distribution conductors being connected to theterminating resistors 321 n, 321 p at the lower right in the figure,respectively.

On to the distribution conductors 221 n, 221 p, the same data havingreverse polarity with each other, i.e., so-called differential signalsare outputted.

Similarly, LSI 122-124 are connected with the distribution conductors222 n, 224 p-224 n, 224 p of the printed circuit board, respectivedistribution conductors being connected to the terminating resistors 322n, 322 p-324 n, 324 p at their right ends. Signal, which starts from LSI121, propagates through the distribution conductors 221 n, 221 p of theprinted circuit board, and induces signals in the distributionconductors 222 n, 222 p of the printed circuit board, via a gap shown as1-2, owing to so-called cross talk noise generation mechanism.Similarly, signals are induced in the distribution conductors 224 n, 224p of the printed circuit board at a gap 1-4, and in the distributionconductors 223 n, 223 p of the printed circuit board at a gap 1-3, lastarriving at the terminating resistors 321 n, 321 p to be extinguishedthere. Among the induced signals, signals corresponding to backwardcross talk propagate through the distribution conductors 22 n, 22 p-224n, 224 p toward LSIs 122-124 respectively, and are demodulated in LSI122-124 to complete the data transfer.

In the distribution conductors 222 n, 222 p-224 n, 224 p, differentialsignals induced by differential signals propagate, and are demodulatedin LSIs 122-124 by differential comparators.

In the wiring shown in FIG. 12, similarly to LSI 121, signals outputtedfrom whichever LSIs 122-124 arrive at the other LSIs as backward crosstalk, and are demodulated to complete data transfer. Namely, thisnetlike wiring makes it possible to transfer data between all LSIs.

FIG. 13 shows signals outputted from LSI and backward cross talk noisesreceived and demodulated. In the fourth embodiment of the presentinvention, outputted signal is about 5 V at “H” level and about 4 V at“L” level, which are output levels compatible with P-ECL. Signalsoutputted from LSI, for example LSI 121, are in a combination of “H”,“L” or “L”, “H” in order of 221 p, 221 n. These signals induce signalswith amplitude of 60-70 mV centering at GND level, as cross talks viagap coupling between the distribution conductors of the printed circuitboard. For example, in the case of “H”, “L” in order of 221 p, 221 n,signals 410 p, 410 n are induced.

A comparator 5 shown in FIG. 13 has inputs 51 p, 51 n, and output 52.Taking an example of LSI 122, 51 p is connected to the conductor 222 p,and 51 n to 222 n. Signals in a combination of 410 p, 410 n arepropagated through 222 p, 222 n, received by the differential comparator5 of LSI 122, and demodulated to obtain signal 51 at “H” level.

In the fourth embodiment of the present invention, the amplitude inducedin a distribution conductor is not different from the amplitude inducedin the first-third embodiments of the present invention. However, twodistribution conductors are paired to constitute differential circuit,with one polarity being inverted, so that input amplitude of adifferential comparator of receiving LSI is expanded to 120-140 mV,twice as large as the original amplitude, and design sensitivity of thedifferential comparator can be relaxed.

Further, as for signals inputted into the differential comparator, evenwhen the center of amplitude, i.e., ground potential swings due to somefactor, the differential comparator can demodulate the signals withoutdepending on the ground potential, and thus has an excellent noiseinsulating characteristic. In particular, in an information processingunit provided with the gap coupling type bus system of the presentinvention, a printed circuit board and power supply circuit have feedsystem impedance. When a steep variation of load occurs within the unit,current supplied by the printed circuit board or power supply circuitvaries steeply, and, as a result, “floating-up” noise of groundpotential called ground bounce is generated. As a cause of this loadvariation, are mentioned transition time from an idle or sleep state ofCPU to an operating state, and transition time from power-down mode of amemory device to an operating state. Current change at such time issteep, reflecting an operation frequency of CPU or the memory device.Since band of an operation frequency of CPU or the memory device isclose to the operation frequency of the gap coupling type bus system ofthe present invention, influence of the noise is large.

FIG. 14 shows propagation of waveform produced in accordance with themechanism of FIG. 13. In FIG. 14, the horizontal axis indicates timeseries, and the vertical axis shows LSIs 121-124 successively from thetop.

First, as shown, signals 41 n, 41 p outputted by LSI 121 induce 412 n,412 p via 1-2, and 412 n, 412 p arrive at LSI 122. Then, the signals 41n, 41 p induce 414 n, 414 p via 1-4, and 414 n, 414 p arrive at LSI 124.Next, the signals 41 n, 41 p induce 413 n, 413 p via 1-3, and 413 n, 413p arrive at LSI 123.

Signals 43 n, 43 p outputted by LSI 123 induce 434 n, 434 p via 3-4, and434 n, 434 p arrive at LSI 124, as shown. Then, the signals 43 n, 43 pinduce 431 n, 431 p via 1-3, and 431 n, 431 p arrive at LSI 121. Next,the signals 43 n, 43 p induce 432 n, 432 p via 2-3, and 432 n, 432 parrive at LSI 122.

FIG. 15A shows a part of wiring pattern of the distribution conductorsof the printed circuit board of the gap coupling type bus system of thepresent invention.

The distribution conductor 221 pa of the printed circuit board iscoupled with the distribution conductor 224 pb at the upper left in thefigure with a gap between them. This gap is 1-4 on the p-pole side, andsignal propagated through the distribution conductor 223 pa induces thedistribution conductor 224 pb, or signal propagated through thedistribution conductor 224 pb induces the distribution conductor 221 pa,to transmit signal.

The distribution conductor 224 pb goes obliquely toward the upper rightfrom that point. The distribution conductor 221 pa goes obliquely towardthe lower right, crosses, in grade separation, the distributionconductor 224 nb that goes toward the upper right, and thereaftercontinues going obliquely toward the lower right, to be coupled with thedistribution conductor 223 pb via gap.

The distribution conductor 223 pa of the printed circuit board isconnected to the distribution conductor 223 pb through a via hole at thelower left in the figure. As a matter of fact, the distributionconductor 223 pa comes from the left and outside of the figure, and goesobliquely from the upper left to arrive at the via hole shown. From thisportion, the distribution conductor 223 pb goes obliquely toward theupper right from the via hole, crosses, in grade separation, 221 na thatcomes down obliquely from the upper right, and subsequently, is coupled,via a gap, with the distribution conductor 221 na which has comeobliquely toward the lower right. This gap is 1-3 on the p-pole side inFIG. 12.

In the left and middle portion, the distribution conductors 221 na and224 nb are coupled with each other via a gap. This gap is 1-4 on then-pole side in FIG. 12. The distribution conductor 224 nb comes from theleft and outside of the figure, and goes obliquely from the lower leftto arrive at this gap. The distribution conductor 224 nb continues goingobliquely toward the upper right, crosses, in grade separation, thedistribution conductor 221 pa, and thereafter, continues going obliquelytoward the upper right to be coupled with 222 na via a gap.

These conductors 221 pa, 221 na, 222 na, and 223 pa are laid in thesignal layers 200 a, and conductors 224 pb, 224 nb, 223 nb, and 223 pbare laid in the signal layer 200 b. A pattern is provided to surroundthe signal lines 221 pa, 221 na, 223 na, 223 pa, etc., and groundedthrough a via hole in the ground layer.

This grounding is called a guard pattern, and by this guard pattern,conductors 221 pa and 223 pa, for example, are separated from each otherin their electromagnetic fields, thus excluding coupling within the samesignal layer.

This guard pattern may be constructed as shown in FIG. 15B. Namely, theguard pattern is not provided between the signal lines 221 pa, 221 na ofthe same signal, and provided between 221 na and 223 pa, and between 222na and 221 pa, i.e., between adjacent signals. Thus, the guard patternis constructed so that it is not provided between p-channel andn-channel of the same signal, but provided between adjacent signals inthe same layer. By this construction, electromagnetic coupling is strongbetween the lines of p-channel and n-channel of the same signal, anddisturbance of impedance becomes small. In addition, in contrast withFIG. 15A, those lines are electromagnetically coupled between foursignal lines in the gaps for generating cross talk, and, since crosstalk is generated in each combination, desired signals can be induced.

Further, in the boards of FIGS. 15A and 15B implementing the gapcoupling type bus system of the present invention, signal is induced,owing to the cross talk noise generation mechanism, at a portion wheredistribution conductors intersect each other. In the gap describedabove, pulse width of an induced signal depends on parallel wiringlength of distribution conductors. In the embodiments of the presentinvention, this parallel wiring length is about 2-5 cm. This parallelwiring length is decided based on pulse width sensitivity of thedifferential comparator as an input circuit of LSI. When LSI process orprocessing accuracy such as 0.35 μm becomes finer in the future, pulsewidth sensitivity of the differential comparator is improved, andparallel wiring length can be shortened.

In FIGS. 15A and 15B, at portions where distribution conductors, forexample 221 pa and 224 nb, or, 221 na and 223 pb, cross in gradeseparation between the signal layers, a crossing angle is a right anglein all cases. Owing to the crossing in grade separation at such a rightangle, wiring length at that gap coupling between the distributionconductors becomes the minimum. Thus, signal induced by the cross talknoise generating mechanism becomes very small, and its pulse widthbecomes shorter than the sensitivity of the differential comparator andis ignored by the differential comparator.

Accordingly, the wiring pattern, shown in FIGS. 15A and 15B, of thedistribution conductors of the printed circuit board of the gap couplingtype bus system of the present invention realizes wiring that includesgrade separation of the distribution conductors to be coupled and gradeseparation of the conductors not to be coupled.

In so-called differential circuit method shown in the fourth embodimentof the present invention, data transfer is performed in such a mannerthat 1 bit signal is outputted differentially, and demodulated by adifferential comparator via a pair of distribution conductors. Thisdifferential circuit method can be applied to the second and thirdembodiments of the present invention. Further, in those cases, patternsof the printed circuit boards can be easily realized by providing gapsas grade separation crossing at a right angle or running in parallel.

Referring to FIGS. 16-18, an information processing unit provided withthe gap coupling type bus system of the present invention will bedescribed. In the figures, the reference numeral 1 refers to LSIconnected to the gap coupling type bus system of the present invention,2 to a cable constituting the bus system, 20 to conductors of a printedcircuit board constituting the bus system or to that printed circuitboard, 3 to (a group of) terminating resistors, 60 to a network routeror processing LSI or a group of circuitries on the receiving side of anelectronic switching system, 61 to a network router or processing LSI ora group of circuitries on the sending side, 7 to a network router orinterface LSI or a group of interface circuitries on the network side ofthe electronic switching system, 8 to CPU constituting multiprocessor,90 to cache memory or local memory and its controller, 91 to memorymodule constituting main memory, 92 to LSI or a group of circuitries ofLAN interface, 93 to LSI or a group of circuitries of disk controller,and 94 to HDD.

FIGS. 16 and 17 show internal structure of a network router orelectronic switching system.

Referring to FIG. 16, internal structure of the network router orelectronic switching system having a back plane comprising a cablemounted with the gap coupling type bus system. In FIG. 16, the gapcoupling type bus system of the present invention comprises LSI 1, acable 2 constituting the bus system, and (a group of) terminatingresistors 3. A plurality of (four in FIG. 16) LSIs 1 are connected tothe cable 2 constituting the bus system, each LSI 1 being mounted on aseparate printed circuit board. This printed circuit board is providedwith processing LSI or circuitries 60 on the receiving side of thenetwork router or electronic switching system, processing LSI orcircuitries 61 on the sending side of the network router or electronicswitching system, and interface LSI or interface circuitries 7 on thenetwork side of the network router or electronic switching system.

The left side of the interface LSI or interface circuitries 7 on thenetwork side of the network router or electronic switching system, isconnected with general public telephone lines, or, optical fiber cablesor metal cables (such as coaxial cables or twisted cables) of digitalchannels (such as private lines or frame relay switch) of the outside(i.e., LAN, WAN or ISDN for the network router, for example), to performpacket processing between networks and lines. In the case of theelectronic switching system, that left side is connected with opticalfiber cables or metal cables such as coaxial or twisted cables ofsubscriber lines, lines destined to other switching systems within atelephone office, or basic trunks destined to central telephone offices,to perform packet processing between lines, and thereby to performswitching between a plurality of layers such as subscriber line andbasic trunk.

Operation will be described in detail. A packet received by theinterface LSI or interface circuitries 7 on the network side of thenetwork router or electronic switching system is separated into headerand data of the packet by the processing LSI or circuitries 60 on thereceiving side of the network router or electronic switching system.After the address shown in the header is analyzed, transfer destinationof the packet is decided.

In the case that the transfer destination is a line or network connectedto the interface LSI or interface circuitries 7 on the network side ofthe network router or electronic switching system, the packet isdelivered from the processing LSI or circuitries 60 on the receivingside of the network router or electronic switching system to theprocessing LSI or circuitries 61 on the sending side of the networkrouter or electronic switching system. There, its header is replacedwith new header, and then, the packet is delivered to the interface LSIor interface circuitries 7 on the network side of the network router orelectronic switching system, to which the relevant line or network isconnected, to be sent therefrom.

In the case that the transfer destination is a line or network connectedto the interface LSI or interface circuitries 7 on the network side ofthe network router or electronic switching system on another board, thatpacket is delivered to LSI 1. From that LSI 1, it is transferred to LSI1 on other board via the cable 2 constituting the bus system. The packetoutputted from the LSI 1 onto the cable 2 constituting the bus system isadded with an address corresponding to a new address. LSI 1 on otherprinted circuit board assigned with this address delivers the receivedpacket to processing LSI or circuitries 61 on the sending side of thenetwork router or electronic switching system on the same printedcircuit board. After the header is replaced with the new header, thepacket is delivered to interface LSI or interface circuitries 7 of thenetwork router or electronic switching system connected to the relevantline or network, and is sent therefrom.

In FIG. 16, the cable 2 constituting the bus system realizes clockfeeding with very small clock skew, employing the gap coupling type bussystem shown in the third embodiment of the present invention. Further,by employing the gap coupling type bus system shown in the first orfourth embodiment of the present invention, address indicating relevantLSI 1 among the LSIs 1 and the packet to be switched are propagatedthrough the cable 2. The cable 2 includes transmission lines for clock,data packet, and address.

In FIG. 16, the cable 2 constituting the bus system realizes so-calledback plane. Here, “back plane” means back plane bus which can performbidirectional data transmission and is constructed by a flexible cable.The cable 2 may be constructed as FPC (Flexible Printed Circuit), forexample.

Referring to FIG. 17, internal structure of the network router orelectronic switching system having back plane comprising a printedcircuit board furnished with the gap coupling type bus system will bedescribed. For the sake of simplicity, description that overlaps FIG. 16will be omitted.

In FIG. 17, LSI 1 is mechanically and electrically connected todistribution conductors of a printed circuit board constituting a bussystem and to that printed circuit board 20, and distribution conductorsconnected to LSI 1 are terminated by terminating resistors 3 in theneighborhood of the LSI 1, thus realizing the gap coupling type bussystem. Wiring of the conductors of the printed circuit boardconstituting the bus system and that printed circuit board 20 realizesclock feeding with very small clock skew by employing the gap couplingtype bus system shown in the third embodiment of the present invention.Further, address indicating the relevant LSI 1 among the LSI 1 and thepacket to be switched are propagated through the gap coupling type bussystem shown in the second embodiment of the present invention.

By applying the gap coupling type bus system of the second embodiment ofthe present invention, a packet transferred from one LSI 1 to the otherLSIs 1 arrives at those other LSIs at the same time. Owing to thissimultaneous arrival, LSI having a right of outputting a packet in thenext place, i.e. so-called bus right, can easily recognize an end oftransfer cycle of the previous LSI 1. This shortens time for switchingLSI 1 that outputs a packet, and more improves data transfer efficiency.

FIG. 18 shows internal structure of a computer furnished with the gapcoupling type bus system.

In FIG. 18, LSI 1 is mechanically and electrically connected todistribution conductors of a printed circuit board constituting a bussystem and to that printed circuit board 20, and distribution conductorsconnected to LSI 1 are terminated by terminating resistors 3 in theneighborhood of the LSI 1, thus realizing the gap coupling type bussystem. Wiring of the conductors of the printed circuit boardconstituting the bus system and that printed circuit board 20 realizesclock feeding with very small clock skew by employing the gap couplingtype bus system shown in the third embodiment of the present invention.Further, address indicating the relevant LSI 1 among the LSI 1 and dataare propagated through the gap coupling type bus system shown in thesecond embodiment of the present invention.

As for the boards mounted with respective LSIs 1, two boards from thetop are processor elements realizing multiprocessor, one under them is amemory riser card mounted with a memory module, and the lowest one is anI/O card mounted with network interface for LAN or the like, and a diskcontroller for connecting HDD via SCSI or Fibre Channel.

Each processor element is mounted with CPU 8, LSI 1 and cache memory 90,and they are connected with CPU bus. On the processor element, LSI 1operates as a cache controller and controls the cache memory 90.

The memory riser card is mounted with LSI 1 and the memory module 91constituting the main memory. LSI 1 operates as a memory controller andcontrols read and write of the memory module 91 constituting the mainmemory.

The I/O card is mounted with LSI 1, LSI 9 which is LAN interface, and adisk controller LSI or circuitries 93. LSI 1, LSI 9 of LAN interface,and the disk controller LSI or circuitries 93 are connected with I/Obus. Further, the disk controller LSI or circuitries 93 connects HDD 94via SCSI or Fibre Channel.

Bus of the distribution conductors of the printed circuit boardconstituting the bus system and that printed circuit board 20 realizesclock feeding with very small clock skew to the processor elements, thememory riser card mounted with the main memory, and the I/O card.Further, address indicating the relevant LSI 1 among the LSIs 1 and apacket to be switched are propagated, employing the gap coupling typebus system shown in the second embodiment of the present invention.

The gap coupling type bus system shown in the second embodiment of thepresent invention realizes signal lines for information, such ascoherency information of the cache, that needs to simultaneously arriveat the processor elements, the memory riser card, and the I/O card.

Industrial Applicability

The present invention can be applied to an information processing unit,and, in particular, is preferably used for producing its bus system.

What is claimed is:
 1. A gap coupling type bus system, comprising atleast three modules, each module being provided with at least onesending/receiving circuit for sending and receiving a signal; at leastthree signal lines respectively connected to said at least threemodules; and terminating resistors connected to respective signal linesat other ends of the signal lines, each terminating resistor havinggenerally same value as characteristic impedance of said signal line;wherein: said at least three signal lines have portions laid in parallelwith one another with a predetermined gap, each signal line for one ofthe at least three modules being intertwined with the signal lines ofthe other at least three modules.
 2. The gap coupling type bus systemaccording to claim 1, wherein: said at least three signal lines are laidin a generally netlike pattern, crossing one another in gradeseparation.
 3. The gap coupling type bus system according to claim 2,wherein: said signal lines are laid in parallel at portions of crossingin grade separation.
 4. The gap coupling type bus system according toclaim 1, wherein: said at least three modules are arranged in a line,said terminating resistors corresponding to these modules are arrangedin parallel with said line of the at least three modules at a distancefrom said modules, and each signal line is laid in a meander shapebetween each module and a corresponding one of said:terminatingresistor.
 5. The gap coupling type bus system according to claim 2,wherein: said at least three modules are arranged in a line, saidterminating resistors corresponding to these modules are arranged inparallel with said line of the at least three modules at a distance fromsaid modules, and each signal line is laid in a meander shape betweeneach module and a corresponding one of said terminating resistor.
 6. Thegap coupling type bus system according to claim 5, wherein: said atleast three modules are arranged in a line, said terminating resistorscorresponding to these modules are arranged in parallel with said lineof the at least three modules at a distance from said modules, and eachsignal line is laid in a meander shape between each modules and acorresponding one of said terminating resistor.
 7. The gap coupling typebus system according to claim 2, wherein: said signal lines are laidsuch that, at some portions of the grade separation, the signal linescross each other at a right angle.
 8. The gap coupling type bus systemaccording to claim 1, wherein: each module and each terminating resistorcorresponding to that module positioned at both ends of each signal lineare arranged adjacently, and each of said at least three signal lines islaid in a loop or fold structure from each module to the terminatingresistor corresponding to that module.
 9. The gap coupling type bussystem according to claim 8, wherein: said at least three modules arearranged generally in a line, and the signal line of each module hasportions laid in parallel with and adjacently to the signal lines otherthan said signal line of each module successively in mid course of thewiring in the loop or fold structure from its own sending/receivingcircuit to the corresponding terminating resistor.
 10. The gap couplingtype bus system according to claim 8, wherein: length of each signalline in said loop or fold structure is generally same for any of saidmodules, and length of a path from a sending/receiving circuit of onemodule through said portions laid in parallel and adjacently, to asending/receiving circuit of other module is generally same as thelength of each signal line.
 11. The gap coupling type bus systemaccording to claim 9, wherein: length of each signal line in said loopor fold structure is generally same for any of said modules, and lengthof a path from a sending/receiving circuit of one module through saidportions laid in parallel and adjacently, to a sending/receiving circuitof other module is generally same as the length of each signal line. 12.A gap coupling type bus system, comprising at least three modules, eachmodule being provided with at least one sending/receiving circuit forsending and receiving a signal; at least three signal lines respectivelyconnected to said at least three modules; and terminating resistorsconnected to respective signal lines at other ends of the signal lines,each terminating resistor having generally same value as characteristicimpedance of said signal line; wherein: one of said at least threesignal lines is a basic signal line, and signal lines of the modulesother than said basic signal line are successively laid in parallel withsaid basic signal line with a predetermined gap to form stubs, eachsignal line for one of the at least three modules being intertwined withthe signal lines of the other three modules, and length of paths of saidbasic signal line of a module through said signal lines laid inparallel, and through other signal lines forming said stubs, and saidsignal lines of said other modules are generally the same.
 13. The gapcoupling type bus system according to claim 1, further comprising twodistribution conductors, wherein: the signal line connected with saidsending/receiving circuit has said two distribution conductors,depending on a logical value of an input of said sending/receivingcircuit, a sending circuit of said sending/receiving circuit outputs anequivalent onto one of said two distribution conductors, and an invertedvalue onto the other of said two distribution conductors, and areceiving circuit of said sending/receiving circuit comprises adifferential circuit that receives, as inputs, said equivalent of one ofsaid two distribution conductors and said inverted value of the other,and outputs said logical value after demodulation.
 14. The gap couplingtype bus system according to claim 8, further comprising twodistribution conductors, wherein: the signal line connected with saidsending/receiving circuit has said two distribution conductors,depending on a logical value of an input of said sending/receivingcircuit, a sending circuit of said sending/receiving circuit outputs anequivalent onto one of said two distribution conductors, and an invertedvalue onto the other of said two distribution conductors, and areceiving circuit of said sending/receiving circuit comprises adifferential circuit that receives, as inputs, said equivalent of one ofsaid two distribution conductors and said inverted value of the other,and outputs said logical value after demodulation.
 15. The gap couplingtype bus system according to claim 12, further comprising twodistribution conductors, wherein: the signal line connected with saidsending/receiving circuit has said two distribution conductors,depending on a logical value of an input of said sending/receivingcircuit, a sending circuit of said sending/receiving circuit outputs anequivalent onto one of said two distribution conductors, and an invertedvalue onto the other of said two distribution conductors, and areceiving circuit of said sending/receiving circuit comprises adifferential circuit that receives, as inputs, said equivalent of one ofsaid two distribution conductors and said inverted value of the other,and outputs said logical value after demodulation.